1. Field of the Invention
This invention relates to a panel structure of plasma display panels.
The present application claims priority from Japanese Applications No. 2005-084297 and No. 2006-017643, the disclosure of which is incorporated herein by reference.
2. Description of the Related Art
FIG. 1. to FIG. 4 illustrate the structure of a conventional plasma display panel (hereinafter referred to as “PDP”). FIG. 1 is a front view of the conventional PDP. FIG. 2 is a sectional view taken along the V1-V1 line in FIG. 1. FIG. 3 is a sectional view taken along the V2-V2 line in FIG. 1. FIG. 4 is a sectional view taken along the W-W line in FIG. 1.
In FIGS. 1 to 4, the conventional PDP includes a plurality of row electrode pairs (X, Y) which are arranged in parallel on the rear-facing face of a front glass substrate 1 serving as the display surface and extend in the row direction of the front glass substrate 1 (the right-left direction in FIG. 1).
A row electrode X is composed of T-shaped transparent electrodes Xa formed of a transparent conductive film made of ITO or the like, and a bus electrode Xb which is formed of a black- or dark-colored metal film and which extends in the row direction of the front glass substrate 1 and is connected to the narrow proximal ends of the transparent electrodes Xa.
A row electrode Y, likewise, is composed of T-shaped transparent electrodes Ya formed of a transparent conductive film made of ITO or the like, and a black bus electrode Yb which is formed of a black- or dark-colored metal film and which extends in the row direction of the front glass substrate 1 and is connected to the narrow proximal ends of the transparent electrodes Ya.
The row electrodes X and Y are arranged in alternate positions in the column direction of the front glass substrate 1 (the vertical direction in FIG. 1). In the two face-to-face row electrodes X and Y, the transparent electrodes Xa and Ya, which are regularly spaced along the associated bus electrodes Xb and Yb, each extend out toward their counterparts in the row electrode pair, so that the wide distal ends of the transparent electrodes Xa and Ya face each other across a discharge gap g of a required width.
Each of the row electrode pairs (X, Y) forms each of the display lines L of the panel.
Black or dark-colored light absorption layers (light-shield layers) 2 are further formed on the rear-facing face of the front glass substrate 1. Each of the light absorption layers 2 extends in the row direction along and between the back-to-back bus electrodes Xb and Yb of the respective row electrodes (X, Y) adjacent to each other in the column direction.
In turn, a first dielectric layer 3 is formed on the rear-facing face of the front glass substrate 1 and covers the row electrode pairs (X, Y) and the light absorption layers 2.
On the rear-facing face of the first dielectric layer 3, belt-shaped column electrode bodies Da each forming part of a column electrode D are regularly arranged in parallel at predetermined intervals. Each of the belt-shaped column electrode bodies Da extends in a direction at right angles to the row electrode pairs (X, Y) (i.e. in the column direction) and parallel to the centerline between the adjacent transparent electrodes Xa and adjacent transparent electrodes Ya which are spaced in the row direction along the associated bus electrodes Xb, Yb of the row electrodes X, Y.
Belt-shaped column-electrode discharge portions Db forming part of each column electrode D are further formed on the first dielectric layer 3 and integrally with each column electrode body Da. Each of the column-electrode discharge portions Db extends out from one side of the column electrode body Da in the row direction in each display line L such that the leading end of the column-electrode discharge portion Db is positioned opposite to a middle position of each discharge gap g between the transparent electrodes Xa and Ya of each row electrode pair (X, Y).
A second dielectric layer 4 is formed on the rear-facing face of the first dielectric layer 3 so as to cover the column electrode bodies Da and the column-electrode discharge portions Db of the column electrodes D.
Additional dielectric layers 4A project from the rear-facing face of the second dielectric layer 4 toward the rear of the PDP. Each of the additional dielectric layers 4A is formed on a portion of the second dielectric layer 4 opposite to the back-to-back bus electrodes Xb and Yb of the respective and adjacent row electrode pairs (X, Y) and also to the light absorption layer 2 located between these bus electrodes Xb and Yb so as to extend along the bus electrodes Xb and Yb in the row direction.
An MgO protective layer (not shown) is formed on the rear-facing faces of the second dielectric layer 4 and the additional dielectric layer 4A.
The front glass substrate 1 is placed opposite the back glass substrate 5 with a discharge space in between. An approximate grid-shaped partition wall unit 6 composed of belt-shaped vertical walls 6A and belt-shaped lateral walls 6B is formed on the front-facing face (i.e. the face facing toward the display surface of the PDP) of the back glass substrate 5. Each of the vertical walls 6A extends in the column direction along the portion of the back glass substrate 5 opposite the column electrode body Da formed on the front glass substrate 1. Each of the lateral walls 6B extends in the row direction along the portion of the back glass substrate 5 opposite the back-to-back bus electrodes Xb and Yb of the respective and adjacent row electrode pairs (X, Y) and the light absorption layer 2 located between these bus electrodes Xb and Yb. The partition wall unit 6 partitions the discharge space defined between the front glass substrate 1 and the back glass substrate 5 into areas each corresponding to paired transparent electrodes Xa and Ya in each row electrode pair (X, Y) to form quadrangular discharge cells C.
In each discharge cell C, a phosphor layer 7 covers the five faces: the surface of the back glass substrate 5 and the side faces of the vertical walls 6A and the lateral walls 6B of the partition wall unit 6. The primary colors, red, green and blue are applied to the phosphor layers 7 and arranged in this order in the row direction for the respective discharge cells C.
The discharge space between the front glass substrate 1 and the back glass substrate 5 is filled with a discharge gas that includes xenon.
A conventional PDP having such a structure is disclosed in Japanese unexamined patent publication 2004-39578, for example.
In the conventional PDP of a structure as described above the manufacturing process is simplified and the manufacturing cost is significantly reduced by forming both the row electrode pairs (X, Y) and the address electrodes D on the front glass substrate 1, and by forming the column electrode body Da and the column-electrode discharge portion Db in the same plane on the rear-facing face of the first dielectric layer 3. However, the conventional PDP has problems as described below.
Specifically, when the PDP is driven, as illustrated in FIG. 1, an address discharge d for selecting the discharge cells C to allow it to emit light is initiated between the transparent electrode Ya of the row electrode Y and the column-electrode discharge portion Db of the address electrode D, and also between the transparent electrode Ya and the column electrode body Da adjacent to a side of the transparent electrode Ya.
However, in the conventional PDP, the column electrode body Da of the address electrode D is located adjacent to another transparent electrode Ya which faces toward an unrelated discharge cell C adjacent to the required discharge cell in the row direction. For this reason of positional relation, a false address discharge ed may also be initiated between the address electrode D and the adjacent unrelated transparent electrode Ya, resulting in selecting the discharge cell C which must not the one to be selected.